fSEM (Sep 2020 - )

We're figuring out how to build a frugal SEM (O($500)) with Prof. Fabian Pease in Prof. Manu Prakash's course on Frugal Science! More on this later; Link to Project pitch

Quantum Dot Photodetectors (Sep 2020 - )

Quantum dots (Click for a pretty detailed Wiki page) are nanoparticles and these are also semiconducting. By virtue of being nanoparticles, they absorb light, and the region where they absorb light can be tuned by changing their size! The size of these nanoparticles is usually changed by simply varying some parameters during their chemical synthesis.

At CeNSE at the Indian Institute of Science, I am working to use these quantum dots as the light absorbers in photodetectors. The most enjoyable (and tiring) part is all kinds of fabrication and deposition processes like wafer cleaning, Atomic Layer Deposition and RF sputtering that I get to use to build devices. With that comes a new appreciation for the insane amount of work that has gone into getting semiconductor technology like our phones to the point it is at now.

Thread Based Transistors (Aug 2019 - Aug 2020)

Thread Based Transistors (TBTs) are transistors built on threads that can be woven into fabric. They take advantage of threads' inherent flexibility, as demonstrated by Rachel Owyeung's paper.

I'd never thought transistors could be made without clean room processing, with my own hands. But that's what I did in my thesis project at Tufts University with Professor Sameer Sonkusale.

Here, I came up with a high-throughput fabrication method to create hundreds of TBTs in one batch. This whole process takes about 2 hours including curing time. Earlier, only one TBT could be fabricated at a time. I will be presenting this work at MRS 2020. Link will be posted here when available!

Interestingly, these TBTs can be used to make 3 dimensional circuits, something I'd like to see being tried out in the future!

Neuromorphic Engineering (May 2019 - Jul 2019)

Neuromorphic engineering is system design that is inspired by the design of neuronal systems, such as the human brain or the octopus retina.

At CentraleSupélec in Paris, France, I had a lot of fun while designing a Neuromorphic ADC. After the project on DPA, it was interesting to see how the fields of biology and electronics interface.

The human brain is awe-inspiring when you read about it, and it is even more amazing to see a neuron simulated in an electrical circuit itself. With Professors Caroline Lelandais-Perrault and Emilie Avignon-Meseldzija, I also worked out the signal reconstruction of these Neuromorphic ADCs, and I found an interesting result - The maximum possible error of these ADCs decreases with time!

Team Anant (Jan 2016 - Dec 2018)

In BITS Pilani's own nanosatellite team, I worked on the On-Board Computer. My work spanning 3 years involved learning and implementing a Hyperspectral Compression algorithm in C, designing the flight plan of the satellite, and writing device drivers to interface sensors.

Writing device drivers was the most fun project during this time, as I learned what exactly goes on at the hardware-software interface, something I had been curious to learn since the beginning of college.

During my last semester with the Team, I founded the Publicity & Sponsorship division with the goal of making the team's work known to the Space Community. As of now, we've been published in two articles (Financial Express, The Asian Age) and are currently working with a well known YouTube creator.

Hardware security (Aug 2018 - May 2019)

Side Channel Attacks are non-software vulnerabilities. One such SCA is Differential Power Attack (DPA). DPA analyzes the power consumption of a system to figure out, say, a cryptographic key in the system. This can be as easy as seeing the voltage across a 50 ohm resistor on an oscilloscope, connected to a system's power supply.

DPA can be countered by ensuring that the power consumed across all input-output combinations of our system is same, or nearly the same. With that, a hacker is required to take (tending to) infinite observations to crack the cryptographic key.

With Professor Anu Gupta, I designed a current flattening circuit with dynamic power scaling to attach with a DPA-immune AND-NAND gate. With this, I was able to achieve a 0.03% variation in the current.